You know what’s really missing in debuggers/software engineering in general?

Something akin to pic related, fluorescence microscopy. So you can mark the data and see exactly where it is at any point in the timeline. Is it really in the cache? I am sick and tired of the phrase “increase the chance of caching”. I want to know if it’s really there. The OS should be able to tell me this.

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Not even OS knows that.

it doesn't matter wether it's there or not, that information wouldn't be portable anyways as it depends on the amount of cache and what other processes are running. all that matters is that your data is more compact in memory so more of it will fit in the cache and you'll get less cache misses, and you can inspect that just fine with regular debugging tools

People like you hold tech back

Wrong. A cache line is only 64 bytes. That’s how much the cpu gets from main memory at a time. While you might get the next thing you need, you’re still not getting enough data unless the cpu can predict what you need next easily enough to cache it in advance. While memory contiguity is a necessary consequence of using arrays, it’s not TECHNICALLY the reason or why you use arrays. It’s because iterating over an array, yes you will grab the next element if your elements are less than 64 bytes, but the REAL reason is that going 1 by 1 over an array is such a predictable memory access pattern that your CPU isn’t too dumb to start getting the cache lines in advance, which is impossible with any pointer based data structure where it just has to follow the pointers and has no idea what it’s gonna find

Simply having things next to eachother isn’t going to work, cache lines aren’t so big that they’re gonna grab everything just because someone declares two big structures at the same time. It’s the memory access pattern that matters

i dont know shit bout debugging but picrel might be similar to what you mean? its called .cantor.dust.
i also found another thing similar to this but cant remember the name

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Even a completely contiguous linked list is going to be trash on the cache. Your CPU simply cannot know what to cache next, until it has read the pointer from the element you’re currently getting. As soon as you move off one cache line, you have to wait, because the cpu can’t know to cache the entire linked list, whereas that’s exactly what compiler tells the cpu to start doing if you tell the compiler you want to iterate over everything in an array

There are no instructions to tell the CPU to cache something, it decides that entirely on its own.

Explain in laymen terms

go fuck yourself

>laymen
excuse me, its laymyn.
please dont use gender exclusive badwords.
Any Forums respects all genders.

You probably need some closed source software from the company that makes your CPU that communicates with the chip itself. If the chip has the capability to report such stuff. Also I think there are dedicated serial communication ports to connect stuff to a chip to inspect stuff, similar to the way you can communicate with an Arduino. I think ARM has an SDK like that and probably Intel must too.

Look into __builtin_prefetch

Yeah, not him but find me one instance of the compiler emiting a prefetch instruction. Prefetch is an obsolete thing that has been replaced by speculative execution.

You don't seem to know what you're talking about.
There are no "declarations" at the assembly level. The CPU doesn't know what you did or did not declare.

CDR coding solved this issue.

I'm don't know if the compiler has enough information to effectively use it.

There seem to be some situations where explicit prefetching is useful.

Sir, please stop injecting dye into your CPU.

No

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in the old days of bare metal programming you could hit a breakpoint and know exactly what the CPU was up to. Last debugging I did was on Sitara SOC CPU with pipelining and caching and debugging was a nightmare

out of curiosity, what are you trying to achieve by being able to see where data is, specifically in caches? are you trying to manipulate instances of cache read/writes?

How is prefetching obsolete? AVX-512 has several prefetch instructions.
If you require that level of optimization, you'll write intrinsics or even ASM anyway, so whether a compiler emits such instructions is irrelevant.